Sunday, June 17, 2012

Tundra CA20C03A



Map: http://siliconpr0n.org/map/tundra/ca20c03a/
Wiki: http://siliconpr0n.org/archive/doku.php?id=mcmaster:tundra:ca20c03a


Corporate headquarters are (were? bought by ON Semi) in Pocatello, Idaho as indicated by the flower / bullet hole / splat:


What caught my interest was that this is a sea-of-gates IC of which I don't see too many.  Marked up layout example with some (not all) transistors marked:



One of the wires to the upper right of Q4 doesn't appear to have a contact.  Not sure whats the deal with that.

In short, a sea of gates designer only creates metal masks to save money.  They pick from a library of predetermined chip sizes and padframes.  Transistors form by routing to the strips of poly crossing the active areas.  Logic gates are separated by occasional gaps in the active areas (as seen above) as well as tying areas high/low to prevent current from flowing.   There is a lot of non-linear routing.  I'm not sure if this is from using a detailed cell lib or if it had a lot of custom layout.  As a result, there are large areas of unused active / poly areas.

Saturday, June 9, 2012

ST 24C02



Wiki: http://siliconpr0n.org/archive/doku.php?id=mcmaster:st:24c026
Map: http://siliconpr0n.org/map/st/24c02/top_metal__ns50xu/

I want to do a more detailed writeup at some point but here are some quick thoughts.  This 256 byte EEPROM chip was much larger than I was expecting.  Close up of some of the cells:




The charge pump can be seen in the lower right hand corner which is identified by the large capacitors:


 At a quick look what may be the output there appear to be a "high voltage" diode string:



Another interesting thing is that I'd expect a chip this small to be fully custom due to the volume market it targets.  You can see a fair amount of diagonal routing so presumably that's at least somewhat true.  However. one of the markings of a larger chip are standard cells.  Of course, even in a fully custom chip there are some regular patterns for repeated circuits so I'm really only talking about glue logic.  There are a few rows of what look like standard cells (highlighted in red):


However, notice the one highlighted in green has  slightly different width than the ones below it.  Additionally,the left and right bank don't actually have the same width as the right is a little narrower.  So if they did use standard cells and not so much a standard cell layout methodology they must be from several different sized libraries.